Sr. Digital / Mixed-Signal Design Engineer Engineering at Geebo

Sr. Digital / Mixed-Signal Design Engineer

Company Name:
Career Development Partners
7153
Location
Pocatello, ID

As a Sr. Digital / Mixed-Signal Design Engineer, you will be responsible for designing, verifying, and validating digital designs that make up a larger mixed signal circuit design.
Duties:
- Interface with place & route teams, integrated circuits top level Integration teams, and test and reliability teams to design, to test, and to transfer the circuit to a manufacturing state.
- Support other design leads in designing, verifying, and validating digital blocks.
- Interface with customers in defining the requirements of the circuit.
- Perform top level mixed signal simulations as required.
- Help support new design methodologies.
- Use behavioral modeling/writing, verilog and/or Verilog-AMS models of analog and mixed signal circuits, work with NVM blocks (OTP / EE).
- Integrate micro-cores, preferred 8051 and ARM M0 / M3, test vector generation and ensure that appropriate measures are adopted for digital domain test Scan chain insertion, DFT/DFM, BIST, logic equivalency checking, signal integrity checking, etc.

Position Requirements
- BSEE required, MSEE a plus.
- 10
years experience with in depth knowledge of digital design concepts, proven experience in digital circuit design, integration of large digital blocks in Mixed-Signal IC, simulation, timing/electrical analysis, Synthesis, verification, STA, Place & Route skills, and Arm core/uP integration.
- Demonstrate digital design implementation and verification including but not limited to RTL coding, synthesis, complex timing constraints, static timing analysis, closing timing, ATPG, and Mixed-signal interface design and debugging.
- Advanced digital and mixed-signal IC design capability with industry standard tools.
- Good Customer communication and chip specification development skills.
- Excellent silicon evaluation (bench testing) skills.
- Experienced in translating RTL to FPGAs to enable architectural debug & confirmation.
- Generating vectors for ATE, directly working with test engineers in ATE environment releasing production worthy tests.
- Project management and coordination of resources.
- Experience with industry standard digital design/ASIC tools.
- Experience in UNIX/Linux and some scripting languages (e.g. Perl, shell, tcl, etc).
- Self-motivated, good communication and able to work well in a team.Estimated Salary: $20 to $28 per hour based on qualifications.

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