Sr. Analog Design Engineer - Carolinas Healthcare (irvine, CA)
26549BR Job Posting Title Sr.
Analog Design Engineer Business Unit Central Engineering Job Description :
Analysis and design of Analog and RF building blocks in CMOS technologies :
Experimental verification and debugging :
Integration of complex RF and Mixed Signal functions into system chips :
Understand and interpret specs :
Translate specs to circuit requirement :
Make intelligent trade:
offs amongst power, area, and performance :
Run simulations and do layout design :
Characterization of silicon :
Participate in system level architectural design of broadband communications SoCs :
Do hard:
core Analog circuit design :
Verification and extraction :
Experimental verification in a lab environment :
ATE bring:
up :
Debug and support of field returns LI:
BS1 J2W:
BS1 Job Requirements :
MS/PhD in Electrical Engineering or equivalent education with at least 9 years of experience with a PhD and 12 years with a MS degree :
Experienced in Cadence design environment :
Able to make system level judgment and associated trade:
offs :
Ability to manage a complex mixed signal chip development from creation into high:
volume production :
Strong grasp of low noise, high linearity design :
Interest in continuous time sigma delta converters :
Knowledge of active filter design implementation :
Design environment/experience with CAD tools :
System level design tools (e.
g.
MatLab) :
Transistor level design (Cadence Analog artist) :
Layout tools (Cadence Virtuoso) :
Verification/extraction :
Experimental verification/ATE support :
Experience with documentation :
Good ommunication skills :
Able to work in a team environment Country US State/Province CA City/Town Irvine Shift 1st Shift :
Day Percent of Travel Required 5 :
10 Function Engineering Discipline Electronic Design Source:
.
Estimated Salary: $20 to $28 per hour based on qualifications.
Analog Design Engineer Business Unit Central Engineering Job Description :
Analysis and design of Analog and RF building blocks in CMOS technologies :
Experimental verification and debugging :
Integration of complex RF and Mixed Signal functions into system chips :
Understand and interpret specs :
Translate specs to circuit requirement :
Make intelligent trade:
offs amongst power, area, and performance :
Run simulations and do layout design :
Characterization of silicon :
Participate in system level architectural design of broadband communications SoCs :
Do hard:
core Analog circuit design :
Verification and extraction :
Experimental verification in a lab environment :
ATE bring:
up :
Debug and support of field returns LI:
BS1 J2W:
BS1 Job Requirements :
MS/PhD in Electrical Engineering or equivalent education with at least 9 years of experience with a PhD and 12 years with a MS degree :
Experienced in Cadence design environment :
Able to make system level judgment and associated trade:
offs :
Ability to manage a complex mixed signal chip development from creation into high:
volume production :
Strong grasp of low noise, high linearity design :
Interest in continuous time sigma delta converters :
Knowledge of active filter design implementation :
Design environment/experience with CAD tools :
System level design tools (e.
g.
MatLab) :
Transistor level design (Cadence Analog artist) :
Layout tools (Cadence Virtuoso) :
Verification/extraction :
Experimental verification/ATE support :
Experience with documentation :
Good ommunication skills :
Able to work in a team environment Country US State/Province CA City/Town Irvine Shift 1st Shift :
Day Percent of Travel Required 5 :
10 Function Engineering Discipline Electronic Design Source:
.
Estimated Salary: $20 to $28 per hour based on qualifications.
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